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Qualcomm • Cambridge, England, United Kingdom
Role & seniority: Graphics Formal Verification Engineer (mid/senior level) in Qualcomm Technologies International Ltd’s Digital ASIC design team.
Stack/tools: Formal verification methodologies and tools; UVM/SystemVerilog; simulation-based verification; design debug and assertion development.
Develop high-quality formal verification test benches to verify GPU designs.
Collaborate with design and implementation teams to verify complex designs.
Perform deep debugging and bug hunting using formal and assertion-based techniques.
Bachelor’s degree (4+ years in ASIC design/verification) or Master’s (3+ years) or PhD (2+ years) in Science/Engineering related field.
Proficiency in debugging, formal verification, assertion development.
Experience with simulation-based verification (UVM/SystemVerilog) is required.
Extended experience with formal verification tools/methodologies and integration into ASIC design flows.
Location & work type: Cambridge, UK; on-site 5 days/week.
QCT's Digital ASIC design team delivers cutting edge hardware and software products that power the user experience and graphics content of the most advanced mobile devices on the market.
Graphics formal verification positions involve the developing high-quality formal verification test benches to verify complex designs in GPU. Position involves working with design, implementation teams to verify designs with high quality. Must be proficient in debugging, deep bug hunting, formal tools, formal verification methodologies and processes. Candidate should be proficient in design debug and assertion development.
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