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Qualcomm • Austin, Texas, United States
Role & seniority: Senior Formal Verification Engineer, Qualcomm Hexagon DSP/NPU team
Stack/tools: Formal verification tools and methodologies; SystemVerilog assertion-based verification; UVM and simulation-based verification flows; RTL/HDL debugging; scripting (Python, Tcl) for automation
Develop and execute formal verification strategies for hardware blocks within the Hexagon NPU
Apply formal tools to prove/falsify assertions, analyze counterexamples, and debug RTL
Document verification plans, results, and coverage; integrate formal verification into the overall verification flow and drive design improvements
Master’s or PhD in Computer Engineering, Computer Science, or Electrical Engineering
3–5 years of hardware design verification experience
3–5 years hands-on experience with SystemVerilog assertion-based verification
Familiarity with UVM and simulation-based verification flows
Proven formal verification sign-off experience for complex RTL
Experience with high-performance processor designs and/or AI accelerator architectures
Ability to decompose/partition complex designs to boost formal verification efficiency
Proficiency in Python or Tcl for automation and tool integration
Location & work type: Location not specified; full-time employment.
Bachelor's degree in Electrical Engineering, Computer Science, Computer Engineering, or related field and 2+ years of Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.
OR
Master's degree in Electrical Engineering, Computer Science, Computer Engineering, or related field and 1+ year of Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.
OR
PhD in Electrical Engineering, Computer Science, Computer Engineering, or related field.
2+ years of experience with high-performance microprocessor design.
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