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Graphcore • Austin, Texas, United States
Role & seniority: Senior Post-Silicon Validation Engineer (Bringup)
Stack/tools: Bare metal embedded C/C++, Python, Linux; FPGA/Emulator; digital ASIC understanding; test automation; cross-functional collaboration
Plan, design, develop and debug silicon validation tests in bare metal C/C++ on FPGA/Emulator prior to first silicon
Deploy tests on first silicon, debug and validate functionality
Develop automated test framework and regression suites; analyze results and drive continuous improvement
Strong Bare metal / embedded C/C++
Good knowledge of digital ASICs; experience with post-silicon validation in digital ASIC environments
Python, Linux; excellent problem-solving, debugging and cross-team collaboration
Proven ability to diagnose deep, complex issues and communicate findings
Driver-level experience (PCIe, Ethernet, memory tech such as LPDDR/DDR/HBM, I2C/I3C/SPI)
Mixed-signal blocks (PLLs, high-speed PHYs), AMBA protocols; Arm CPUs; System IP and debug tools
ML workloads understanding; characterization, failure analysis, statistical analysis, and customer support
Location & work type: Austin, TX; full-time role with on-site/onsite campus presence (flexible interview adjustments offered)
Senior Post Silicon Validation Engineer (Bringup) Salary $156,500 - $211,700 + Phantom Equity + Benefits Graphcore is a globally recognised leader in Artificial Intelligence computing systems. The company designs advanced semiconductors and data centre hardware that provide the specialised processing power needed to drive AI innovation, while delivering the efficiency required to support its broader adoption. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. We are opening a new AI Engineering Campus in Austin which will play a central role in Graphcore's work building the future of AI computing. We are looking to hire Post-Silicon Validation Engineers to join our collaborative, cross-functional development team validating cutting edge, high performance AI chips and platforms. You will play a critical role in supporting new product introductions and post-silicon validation. Working within the Post-Silicon Validation team, you will be involved with bringing first silicon to life, functionally validating it and working closely with many other teams to help it become a fully characterised and working product, reporting project status/progress to program management on a regular basis. You will have the opportunity to, and be responsible for, leading, mentoring, and providing technical guidance to other engineering team members. In this role, you can leverage your experience and industry knowledge to architect and drive implementation of continuous improvements to test infrastructure and processes. The Post-Silicon Validation team sits within the Architecture and Validation team, we are responsible for validation of new silicon when it returns from manufacture, enabling and supporting the production SW and FW teams to bring up their software and also supporting the Silicon Characterisation team. Responsibilities and Duties Plan, design, develop and debug silicon validation tests in bare metal C/C++ on FPGA/Emulator prior to first silicon Deploy silicon validation tests on first silicon and debugging them Develop automated test framework and regression test suites in Python to optimize validation efficiency Collaborate closely with engineers from many other disciplines on a variety of topics Work with Validation and Production Test engineering peers to implement best practices and continuous improvements to test methodologies Analyse test results, identify and debug failures/defects Contribute to shared test and validation infrastructure Provide feedback to architects