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Design for Test Engineer Intern - CPU/AI Hardware

Tenstorrent Austin, Texas, United States

onsite

Salary: $50/hr - $70/hr

Posted Jan 5, 2026

Role & seniority: Internship/entry- to mid-level role in Design for Test (DFT); open to multiple seniorities; focus on DFT for high-performance IPs within AI/ML chip stack.

Stack/tools: RTL; scripting in Tcl, Python, or Perl; DFT concepts (ATPG, BIST); scan insertion; pattern generation; verification workflows; collaboration across RTL to physical design.

Top 3 responsibilities

  1. Define and implement DFT architecture across various IPs.

  2. Collaborate with cross-functional teams from RTL to physical design.

  3. Contribute to scan insertion, pattern generation, and verification workflows; improve test coverage with automated solutions.

  • Must-have skills: Pursuing BS/MS/PhD in EE/CE/ECE/CS; curiosity about chip testing/verification; comfortable with RTL and scripting languages (Tcl, Python, Perl); understanding of digital design basics and test techniques (ATPG, BIST).

  • Nice-to-haves: Prior exposure to DFT workflows, ASIC/SoC testing, automation of test flows, and experience with tapeout processes.

  • Location & work type: On-site, 40 hours/week; Santa Clara, CA or Austin, TX or Ft. Collins, CO. Compensation for interns ranges $50–$70/hour plus potential incentives; equal opportunity employer.

Full Description

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Be part of the team building the backbone of next-gen AI/ML chips. This role focuses on Design for Test (DFT) for high-performance IPs at the heart of industry-leading architectures. You'll work side-by-side with experienced engineers across the RTL, DFT, and Physical Design stack to bring silicon from idea to tapeout. This role is on-site, 40 hours, based out of Santa Clara, CA, Austin, TX or Ft Collins, CO. Who You Are Curious about how complex chips are tested and verified at scale Comfortable working with RTL and scripting languages like Tcl, Python, or Perl Understand digital design basics, scan, and test techniques like ATPG or BIST Actively pursuing a BS, MS, or PhD in EE, CE, ECE, or CS What We Need Help define and implement DFT architecture across various IPs Collaborate with cross-functional teams from RTL to physical design Contribute to scan insertion, pattern generation, and verification workflows Push test coverage higher using smart, automated solutions What You Will Learn Full lifecycle of DFT—from RTL through pattern generation to tapeout How real-world AI/ML chips are built and verified Tools and flows used in cutting-edge ASIC development How to debug, improve, and scale DFT infrastructure in complex SoCs Compensation for all interns at Tenstorrent ranges from $50/hr - $70/hr including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.

Design For TestRTLScripting LanguagesTclPythonPerlDigital DesignScan TechniquesATPGBISTCollaborationPattern GenerationVerification WorkflowsTest CoverageAutomationSoCsmulti-location

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