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AMD • Hyderabad, Telangana, India
Role & seniority: Senior Silicon Design Engineer (SoC verification for ASIC and FPGA)
Stack/tools: Verilog/SystemVerilog, UVM; testbench development; testplanning and coverage; scripting (Python, Perl); IP-level FPGA/ASIC verification; PCIe, CXL IO protocols; regression infrastructure
Verify next-generation ASIC and FPGA SoCs as part of a distributed verification team
Develop testplans, testbenches, testcases, and ensure functional coverage closure; perform regression testing
Debug failures, identify root causes, and collaborate with RTL, firmware, design, software, and architecture teams; review coverage metrics and adjust tests
7+ years (or 5+ years with a Master’s) in Computer/Electrical Engineering
Proficiency in SystemVerilog and UVM; hands-on verification testbench development
IP-level FPGA/ASIC verification experience; strong problem solving and cross-team collaboration
Knowledge of design flow and verification methodologies; scripting ability (Python/Perl)
Experience with PCIe, CXL or other IO protocols
Deeper understanding of RTL, firmware interfaces, and verification infrastructure
Location & work type: Location not specified; work type not specified
WHAT YOU DO AT AMD CHANGES EVERYTHING
At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.
SENIOR SILICON DESIGN ENGINEER
The Role
The focus of this role is to plan, develop, and execute the SoC verification of new and existing features for AMD’s ASIC and FPGA SoCs, ensuring there are no bugs in the final design.
The Person
You have a passion for next-generation FPGA and ASIC design verification. You are a team player with excellent communication skills and experience collaborating with engineers across different sites and time zones. You possess strong analytical and problem-solving abilities, and you're eager to learn and take on challenges.
Key Responsibilities
Work as a member of a geographically distributed verification team to verify next-generation ASIC and FPGAs Develop testplans, implement testbenches, create testcases, and ensure functional coverage closure. Handle regression testing and contribute to verification infrastructure development. Develop both directed and random verification tests. Debug test failures, identify root causes, and work with RTL and firmware engineers to resolve design defects and test issues. Review functional and code coverage metrics, modify or add tests or constrain random tests to meet coverage requirement Collaborate with design , software and architecture teams to verify design under test.
Preferred Experience
Proficient in IP-level FPGA and ASIC verification. Knowledge of PCIe, CXL or other IO protocol is preferred Proficient in Verilog/SystemVerilog, and scripting languages such as Perl or Python. Hands-on experience with SystemVerilog and UVM is mandatory. Experience in developing UVM-based verification testbenches, processes, and flows. Solid understanding of design flow, verification methodology, and general computational logic design and verification
Academic Credentials
Bachelor’s degree with 7+ years of experience, or Master’s degree with 5+ years of experience in Computer Engineering or Electrical Engineering.
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.