🤖 15+ AI Agents working for you. Find jobs, score and update resumes, cover letter, interview questions, missing keywords, and lots more.
Cookies & analytics consent
We serve candidates globally, so we only activate Google Tag Manager and other analytics after you opt in. This keeps us aligned with GDPR/UK DPA, ePrivacy, LGPD, and similar rules. Essential features still run without analytics cookies.
Read how we use data in our Privacy Policy and Terms of Service.
🤖 15+ AI Agents working for you. Find jobs, score and update resumes, cover letter, interview questions, missing keywords, and lots more.
Google • Bengaluru, Karnataka, India
Role & seniority: Verification Engineer (SOC/ASIC), mid-level (4+ years of relevant experience)
Stack/tools: SystemVerilog (SV), Universal Verification Methodology (UVM); development of verification VIPs, verification environment and test plans; cross-IP verification across SOC components (infrastructure IP, interconnects, caches, memory management, system services)
Verify designs using formal/informal and constrained-random verification techniques
Debug failures across cross-functional teams to confirm functional correctness
Provide comprehensive test plans with environment, stimulus, checks, coverage, and user-friendly documentation
Bachelor’s degree in Electrical/Computer Engineering, Computer Science, or related field (or equivalent practical experience)
4+ years of experience with SystemVerilog and UVM
Master’s or PhD in EE/CE/CS with emphasis on computer architecture
Experience in low-power design verification
Location & work type: Location not specified; work type not specified
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
4 years of experience with SystemVerilog (SV) and Universal Verification Methodology (UVM).
Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
Experience in low-power design verification.
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will work in the verification of Google’s SOC offerings. You will collaborate with hardware architects and design engineers for functional and performance verification of the infrastructure IP, interconnects, caches, memory management and system services. You will also work in developing high performance VIPs for protocols supported by our SOCs, and closely collaborate in the deployment of the verification stack across a heterogeneous set of IPs.You will build and verify a generalized class of system topology abstractions, and develop the associated methodologies and tools needed to solve the problem.
The Platforms and Devices team encompasses Google's various computing software platforms across environments (desktop, mobile, applications), as well as our first party devices and services that combine the best of Google AI, software, and hardware. Teams across this area research, design, and develop new technologies to make our user's interaction with computing faster and more seamless, building innovative experiences for our users around the world.
Verify designs using verification techniques and methodologies.
Work cross-functionally to debug failures and verify the functional correctness of the design.
Provide test plans, including verification strategy, environment, components, stimulus, checks, and coverage, and ensure documentation is easy to use.