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Google • Bengaluru, Karnataka, India
Role & seniority: Senior hardware verification engineer (IP/SoC verification) with leadership and cross-functional collaboration expectations.
Stack/tools: SystemVerilog, UVM, SystemVerilog Assertions (SVA), formal verification (tools), constrained-random verification, low-power verification, Gate-Level Simulation (GLS), Python automation, verification testbenches/environments, IP components (cores, caches, hierarchical memory subsystems, DDR/LPDDR).
Plan and drive verification of digital design blocks at Sub-System level; coordinate with design engineers on key scenarios.
Create/enhance constrained-random verification environments or formal verification approaches; verify with UVM/SV or SVA.
Define and close coverage, debug with design teams, and collaborate across architecture, design, silicon validation, and software to align SoC verification strategy and tape-out readiness.
Bachelor’s degree in Electrical/Computer Engineering, Computer Science, or related field (or equivalent practical experience).
8+ years in verification methodologies/languages (UVM, SystemVerilog).
Experience verifying digital systems with standard IP components/interconnects; developing/maintaining verification testbenches and environments.
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
8 years of experience with verification methodologies and languages such as UVM and SystemVerilog.
Experience verifying digital systems using standard IP components/interconnects (e.g., microprocessor cores, caches, hierarchical memory subsystems, DDR/LPDDR).
Experience in developing and maintaining verification testbenches, test cases, and test environments.
Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
10 years of experience with creating and using verification components and environments in a standard verification methodology such as UVM and SV.
Experience with low-power verification, debug, Gate-Level Simulation (GLS), and formal verification, with a track record of owning sub-system level verification and managing dependencies with key stakeholders.
Experience in driving cross-functional teams for high quality tape-outs and leading design verification of complex IPs, successfully delivered to many SoCs.
Proficiency in scripting languages (e.g., Python) for automation and analysis.
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.