Role & seniority: Wireless Radio Verification Engineer (senior level; expected to lead verification efforts)

Stack/tools: ASIC verification with SystemVerilog and UVM; testbench architecture; coverage-driven verification; constrained random testing; assertion-based verification; digital+mixed-signal co-simulation (SystemVerilog-AMS/DMS or real-number modeling); Python scripting for automation

Top 3 responsibilities

Verify complex digital ASICs and radio/digital+RF subsystems to ensure first-time-right silicon
Architect and lead verification environments for radio control, transceiver paths (PLLs, DAC/ADC data paths, power management, co-existence)
Drive verification strategy, planning, cross-functional collaboration (Design, RF, PHY, Systems, Integration) and establish best practices

Must-have skills

BS plus ≥10 years in industry with proven complex ASIC verification and successful silicon tapeouts
Deep expertise in SystemVerilog/UVM, testbench development, coverage-driven verification, constrained random testing, and assertions
Experience bringing up complex designs in simulation and verification environment from scratch

Nice-to-haves

Experience verifying Radio digital controllers, DSPs, PLL control, or wireless transceiver subsystems
Exposure to RF/analog components (LNAs, Mixers, PLLs, amplifiers, LDOs, DAC/ADCs)
Digital+mixed-signal co-simulation (SystemVerilog-AMS/DMS), Python automation, technical leadership, cross-functi

Full Description

Join Apple's Wireless Connectivity team developing state-of-the-art WiFi SoCs that power hundreds of millions of Apple products worldwide. You'll be part of our vertically integrated organization shaping next-gen wireless technology from concept through production. As a Wireless Radio Verification Engineer, you'll ensure first-time-right silicon success through sophisticated testbenches, comprehensive scenarios, and cutting-edge verification methodologies—enabling multi-gigabit wireless technology connecting the world!

DESCRIPTION

As a Wireless Radio Verification Engineer, you will be at the core of our wireless product's success, leading verification of Radio digital controllers and Digital+RF subsystems that enable exceptional wireless performance. You will architect verification environments for complex radio control / transceiver paths spanning PLLs, DAC / ADC data paths, power management, and co-existence mechanisms. Working at the intersection of digital design and RF/mixed-signal-modeled systems, you'll lead cross-functional collaboration spanning Design, RF, PHY, Systems, and Integration teams. You'll develop verification strategies for radio-modeled subsystems enabling robust wireless operation across diverse scenarios and environmental conditions throughout Apple's product ecosystem.

MINIMUM QUALIFICATIONS

BS and a minimum of 10 years relevant industry experience Demonstrated expertise verifying complex digital ASICs with track record of successful silicon tapeouts. Deep knowledge of ASIC verification flows with SystemVerilog and UVM including testbench architecture, verification planning, and coverage-driven methodologies. Experience developing verification environments from scratch and bringing up complex designs in simulation. Experience with constrained random testing, functional coverage, and assertion-based verification.

PREFERRED QUALIFICATIONS

Experience verifying Radio digital controllers, DSPs, PLL control systems, or wireless transceiver subsystems. Exposure to RF/analog system designs such as LNAs, Mixers, PLLs, amplifiers, LDOs, DAC / ADCs. Experience with digital + mixed-signal co-simulation using SystemVerilog analog behavioral models / DMS or similar real-number-modeling approaches. Exposure to Python or similar scripting for automation, analysis, or infrastructure. Technical leadership through example—driving verification strategies, establishing best practices, and delivering complex projects. Excellent communication skills and ability to influence cross-functional technical decisions.