Full Description

At MediaTek, we are driven by a relentless pursuit of excellence, leading the way in performance and innovation across diverse industry sectors. From groundbreaking advancements in mobile, automotive, consumer, and industrial devices to transformative breakthroughs in datacenter computing, MediaTek is on a journey to redefine what is possible. At MediaTek, we are not only re-imagining the future; we are creating it. Come be a part of it. Join our team of exceptionally talented professionals at our Bangalore design center, where we are pioneering cutting-edge technologies that will power the next generation of smartphone chips, IoT and automotive devices, and edge computing solutions. Be a part of MediaTek and join us in shaping the future of technology.

As a Design Verification Lead at MediaTek, you will play a critical role in ensuring the quality and reliability of our high speed IO’s in all our cutting-edge SoC designs. You will work on innovative projects that power the future of technology, collaborating with a global team of experts in a fast-paced and dynamic environment. You will lead our high-speed IO verification efforts across designs and ensuring quality verification with coverage closure. The candidate should have a strong background in RTL verification at IP/Sub System or SoC verification and related methodologies and flows. Background in USB verification at IP or Sub System level is needed. Experience on System level validation aspects is highly desirable. Low power verification exposure is desirable. Experience in test planning & testbench design/improvements and coverage closure is needed. Experience in leading high performing teams is desirable.

Key Responsibilities

• Drive the development and implementation of comprehensive verification test plans for high-speed IO IPs at IP/Subsystem and SoC level.
• Build and enhance testbenches for new Sub Systems, develop verification flows and test cases using System Verilog and UVM methodology.
• Drive functional verification of RTL designs at Sub System level or SoC Level including simulation, debugging and coverage closure – with specific focus to USB and other high speed IO’s like Display Port, PCIe etc - ensuring high-quality and robust designs.
• Collaborate with design and verification teams across locations to understand detailed design specifications and target corner cases and various configurations of at subsystem or SoC level for high speed IO’s.
• Generate and analyze verification metrics to regularly track progress and ensure timely coverage closure.
• Participate in design and verification reviews, test plan reviews, methodology reviews, providing technical expertise and insights.
• Incorporate newer verification techniques and methodologies to improve verification efficiency and effectiveness.
• Guide and mentor junior verification engineers and provide technical guidance to the team.

Qualifications & Experience

• Bachelor's or master’s degree in Electronics, Electrical, Computer Engineering, or related fields from an institute of repute.
• 12+ years of experience in design verification, with a focus on USB IP and Subsystem verification. Good understanding of USB3 and USB4 specifications, signaling, and protocol layers is needed. Knowledge of System Level verification aspects for USB and other high speed IO’s is a plus.
• Proficiency in verification languages and methodologies, such as SystemVerilog, UVM, and other industry-standard tools.
• Track record of successfully leading verification of complex IP blocks, Subsystems or SoC Modules. Strong skills in debugging complex issues at IP, subsystem, and SoC levels.
• Knowledge of other protocol’s like PCIe and Display Port (DP) is a plus.
• Excellent problem-solving skills and ability to articulate their solutions.
• Proven experience leading technical teams and delivering high impact results.
• Need to have strong oral and written communication skills, with an ability to collaborate and work across geographies, in a fast-paced environment.
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